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Contemporary Computing - Third International Conference, IC3 2010, Noida, India, August 9-11, 2010. Proceedings, Part II
Preface
5
Organization
6
Table of Contents – Part II
14
Technical Session-12: System-1 (S-1)
22
Automatic Test Data Generation for Data Flow Testing Using Particle Swarm Optimization
22
Introduction
22
The Data Flow Analysis Technique
23
ProposedWork
26
The Principles of Genetic Algorithm(GA)
26
Particle Swarm Optimization(PSO)
28
Comparison between GA and PSO
29
Simulation Results
30
Comparison with Related Work
31
Conclusion and Future Work
32
References
33
Efficient Storage of Massive Biological Sequences in Compact Form
34
Introduction
34
Related Work
35
Standard Text Compression
35
DNA Compression
36
Overview of the Method
37
Transformation Phase
38
Encoding Phase
38
Word Based Tagged Code
38
Encoding and Decoding Algorithm
39
Encoding Algorithm
39
Decoding Algorithm
39
Empirical Results
40
Conclusions
41
References
41
Maximum Utility Meta-Scheduling Algorithm forEconomy Based Scheduling under Grid Computing
44
Introduction
44
Related Work
45
Maximum Utility Meta-Scheduling
47
Experimental Results
49
Architecture of EcoGrid
49
Experimental Setup and Analysis of Results
51
A Hierarchical Decentralized Scheduling Framework
53
Conclusion
54
References
54
An Accelerated MJPEG 2000 Encoder Using Compute Unified Device Architecture
55
Introduction
55
Related Research
56
System Overview
57
Encoder Workload
57
Introduction to CUDA Hardware Architecture
57
Single Threaded Profiling
59
Parallelization
59
Wavelet Transform
60
EBCOT
60
Results
63
Conclusion
64
References
64
Event-Based Metric for Computing System Complexity
67
Introduction
67
Related Work
68
Proposed Event-Flow Model
69
Modeling Events
69
Modeling Event Interactions Using Event Operators
69
Formal Definition of Event-Flow Model
71
Generating Event-Flow Complexity Metric from Event-FlowModel
72
Event Interdependency Matrices
73
Computing Event-Flow Complexity Metric
74
Definitions and Measurement of Event-Flow Complexity Metric
74
Utility of Event-Flow Complexity Metric
75
Application and Validation of Event-Based Complexity Metric
76
Event Templates
76
Event-Flow Graph
77
Event-Interdependency Matrix
77
Validation of Event-Flow Complexity Metric
78
Conclusion
80
References
81
Technical Session-13: System-2 (S-2)
83
Load Balancing in Xen Virtual Machine Monitor
83
Introduction
83
Virtual Machine Scheduling
84
Simple Earliest Deadline First Scheduler (SEDF)
84
Requirement of Global Load Balancing
86
Description
87
Algorithm
88
Experiments and Results
89
Load Balancing Parameters
89
Related Work
90
Conclusion and Future Work
90
References
90
Aerial Vehicle Based Sensing Framework for Structural Health Monitoring
92
Introduction
92
Previous Work
93
System Architecture
94
Wireless Sensor Network-Tier I
94
The Mobile Agent (UAV)-Tier II
97
Beagle Board Payload
98
Telemetry System
97
Wireless Energy Transfer
98
The Base Station-Tier III
99
Video Receiver
100
Computing Platform
101
Simulation Results
101
Conclusion
103
References
103
A Cross Layer Seamless Handover Scheme in IEEE 802.11p Based Vehicular Networks
105
Introduction
105
Related Work
107
System Model for Proposed Handover Scheme (CSHS)
107
Proposed Handover Scheme (CSHS)
110
Performance Evaluation
111
Conclusion
115
References
115
Modeling and Simulation of Efficient March Algorithm for Memory Testing
117
Introduction
117
Prior Work
118
Memory Built in Self Test
118
Fault models and Memory Test Algorithms
120
Simulation Result
124
Conclusion
127
References
127
A New Approach for Detecting Design Patterns by Graph Decomposition and Graph Isomorphism
129
Introduction
129
Graph Decomposition
130
Relationship Graphs Representation
130
Graph Decomposition Algorithm
132
Graph Isomorphism: A Graph Matching Technique
134
Design Pattern Detection Using Graph Isomorphism
134
Design Pattern Detection as Façade Design Pattern
134
Design Pattern Detection as Strategy Design Pattern
136
Design Pattern Detection as Strategy Design Pattern
137
Particular Design Pattern May or May Not Exist
138
Related Work
139
Conclusion
139
References
139
Technical Session-14: System-3 (S-3)
141
Detection of Polymorphic Viruses in Windows Executables
141
Introduction
141
Overview
143
x86 Memory Management
143
Related Work
144
Static Analysis
145
Design
145
Generic Decryption
145
Choice of Emulator
146
Implementation
147
Results and Discussion
148
Conclusion
149
References
150
Sensitivity Measurement of Neural Hardware:A Simulation Based Study
152
Introduction
152
Related Works
154
Definition of Sensitivity
154
Weight and Node Faults
155
Fault Metric
156
Experiments and Results
156
Conclusion
160
References
160
An Approach to Identify and Manage Interoperability of Class Diagrams in Visual Paradigm and Magic Draw Tools
163
Introduction
163
Problems and Issues Relating to Interoperability in Context of UML Tools
164
Factors Contributing to Interoperability of UML Tools
165
Use of Different XMI Versions
166
Use of Different Version of UML
166
Different Methods for Representing a XMI Tag
167
Identifying and Managing Class Diagram Interoperability in Visual Paradigm and Magic Draw Tools
168
Process to Identify Information Loss during Interconversion
168
Process to Manage Information Loss during Interconversion
170
Results
172
Conclusion and Future work
173
References
174
A Novel Approach to Generate Test Cases Using Class and Sequence Diagrams
176
Introduction
176
Related Work
177
Classification and Critical Review of Existing Approaches
178
Classification of Existing Approaches
178
Critical Review
180
Integrated Approach to Automatic Test Case Generation
181
Detailed Explanation of Each Step
182
Application of Methodology
184
Future Work and Conclusions
187
References
187
Technical Session-15: System-4 (S-4)
189
Arrogyam: Arrhythmia Detection for Ambulatory Patient Monitoring
189
Introduction
189
System Architecture
191
BSN Communication
193
Arrhythmia Detection
197
Simulation Model
198
Conclusion
200
References
200
Test Process Model with Enhanced Approach of State Variable
202
Intorduction
202
Feedback and Control System
204
Software Test Process Modeling with State Variables
205
Effect of Parameter on STP
208
Conclusion and Future Work
212
References
213
Estimation of STP Model Parameter
208
Re-engineering Machine Translation Systems through Symbiotic Approach
214
Introduction
214
ILMT Project: Its Assumptions and Guidelines
215
Distinguishing Features of NLP Applications and ILMT Systems
216
NLP Applications vs. Conventional Software Applications
216
The ILMT System: Architectural Framework and Development Infrastructure
217
The ILMT Systems: Field Deployable and Maintainable Products
218
Well Engineered Field Deployable and Maintainable Software Product
219
The Final ILMT System: Software Engineering Attributes
219
The Symbiotic Software Re-engineering Paradigm for Productizing ILMT Systems
219
The Dashboard Development Infrastructure
220
Module Re-engineering Tasks
220
Subsystem / System Integration to Deliver ILMT System
222
Practical Measures Followed in Modules Re-engineering, Validation, and for ILMT Evaluation
222
The ILMT Systems: The Present State, and the Experiences of Re-engineering ILMT Systems in Symbiotic Mode
223
The Present State
223
Experiences of Re-engineering ILMT Systems in Symbiotic Mode
224
References
225
Analysis for Power Control and Security Architecture for Wireless Ad-Hoc Network
226
Introduction
226
Related Previous Work
228
The Transmit Power Control Problem
229
Design Principles for Power Control
230
To Increase Network Capacity It Is Optimal to Reduce the Transmit Power Level
230
Reducing the Transmit Power Level Reduces the Average Contention at the MAC Layer
231
The Impact of Power Control on Total Energy Consumption Depends on the Energy Consumption Pattern of the Hardware
231
Design Principles for Power Control
232
Simulations
233
An Example Topology
233
Performance Evaluation Clusters
233
Conclusion
235
References
236
Extension of Superblock Technique to Hyperblock Using Predicate Hierarchy Graph
238
Introduction
238
Predicate Hierarchy Graph (PHG)
239
Conclusion and Discussion
248
References
249
Technical Session-16: System-6 (S-6)
251
Vehicular Ad Hoc Network Mobility Models Applied for Reinforcement Learning Routing Algorithm
251
Introduction
251
Routing Protocols
252
Sample
253
AODV
253
Mobility Models
254
Analysis of Mobility Models
254
Results of Mobility Model Analysis
255
Simulation Environment
256
Routing Protocol Metrics
256
Results and Discussion
257
Related Work
259
Conclusion
259
References
260
Hardware and Software Co-Design for Robot Arm
262
Introduction
262
FPGA Controller
263
Data Controller
266
Heart of Controller – FSM
267
Data Path
267
Interfacing of H-Bridge Driver and DC Motor
268
Interfacing of DC Motor and Rotary Encoder
269
Robot Arm
270
Conclusion and Future Work
271
References
272
Security Vulnerabilities of a Novel Remote User Authentication Scheme Using Smart Card Based on ECDLP
273
Introduction
273
Notations
274
Review of Jena et al.’s Proposed Scheme
274
Registration Phase
274
Login Phase
275
Authentication Phase
275
Security Analysis of Jena et al.’s Scheme
275
Impersonation Attack via Registered Identity
275
Masquerading Attack via Registered Password
276
Collusion Attack
276
Error in Jena et al.’ s Scheme
277
Replay Attack
277
Off-Line Password Guessing Attack
278
Attributes of Jena et al.’s Scheme
279
Conclusion
279
References
280
Multiple Polymorphic Arguments in Single DispatchObject Oriented Languages
281
Introduction
281
Message Dispatch in Object Oriented Programming Languages
283
Single Dispatch
283
Multiple Dispatch
284
Techniques and Implementation
284
Double Dispatch
285
Using Run-Time Type Information (RTTI)
286
Reflection
288
Implementation in C++
289
Design and Implementation of the Preprocessor
289
Steps of the Preprocessing
290
Conclusions
291
References
291
Appendix :: Code Snippets
291
Author Index
293
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